Patent
1996-06-11
1998-06-16
Ray, Gopal C.
395842, G06F 1300, G06F 1338
Patent
active
057685452
ABSTRACT:
A collection buffering scheme for a computer system having agents of a pre-emptible bus and a non-pre-emptible bus. An agent of the non-pre-emptible bus, having a data width capability of N bits, when receiving a grant to write to the pre-emptible bus, writes instead to a collection buffer capable of holding a block of more than one N bit data segments. When the collection buffer is filled, the collection buffer writes the entire block of data segments over the pre-emptible bus to a CPU or memory of the computer system. Preferably, the collection buffer is filled when the block size is equal to the data width capability of the pre-emptible bus, such that a single write to the pre-emptible bus utilizes the entire capacity of pre-emptible in a given data transaction. Further, where the system has a CPU posting buffer, a system lock-up prevention negotiator is provided that drains and disables the CPU posting buffer during the data transaction.
REFERENCES:
patent: 5581714 (1996-12-01), Amini et al.
patent: 5606672 (1997-02-01), Wade et al.
patent: 5623697 (1997-04-01), Bland et al.
patent: 5630094 (1997-05-01), Hayek et al.
patent: 5640543 (1997-06-01), Farrell et al.
patent: 5642489 (1997-06-01), Bland et al.
Abramson Darren
Rabe Jeff
Solomon Gary
Intel Corporation
Ray Gopal C.
LandOfFree
Collect all transfers buffering mechanism utilizing passive rele does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Collect all transfers buffering mechanism utilizing passive rele, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Collect all transfers buffering mechanism utilizing passive rele will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1737881