COL (Chip-On-Lead) multi-chip package

Details COL (Chip-On-Lead) multi-chip package COL (Chip-On-Lead) multi-chip package

2008-06-05

2009-11-24

Lee, Calvin (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

Reexamination Certificate

active

07622794

ABSTRACT:
A Chip-On-Lead (COL) multi-chip package is revealed, primarily comprising a plurality of leads, a first chip disposed on the first leads, one or more second chips stacked on the first chip, and an encapsulant. The leads have a plurality of internal leads encapsulated inside the encapsulant where the internal leads are fully formed on a downset plane toward and parallel to a bottom surface of the encapsulant. The height between the internal leads to a top surface of the encapsulant is three times or more greater than the height between the internal leads and the bottom surface. Since the number and the thickness of the second chips is under controlled, the thickness between the top surface of the encapsulant and the most adjacent one of the second chips is about the same as the one between the internal leads and the bottom surface of the encapsulant. Therefore, the internal leads of the leads without downset bends in the encapsulant can balance the upper and lower mold flows and carry more chips without shifting nor tilting.

REFERENCES:
patent: 7564123 (2009-07-01), Wang et al.

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