Coincidence extendable programmable logic device

Details Coincidence extendable programmable logic device Coincidence extendable programmable logic device

1989-01-10

1991-03-26

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307469, 3072722, H03K 19094

Patent

active

050032020

ABSTRACT:
A required number of coincidence detecting circuits for the combinations of N input signals are provided, so that useless PLEs as seen in a table lookup type are eliminated. Product term lines of PLA are extended by a first extension circuit. Similarly, respective coincidence detecting outputs of coincidence detecting circuits of another PLE are connected to each other, so that coincidence signals can be output in association with M (.gtoreq.N) input signals. Coincidence detecting signals of further PLE are connected by a second extension circuit, whereby the number of storing of combinations of N or M input signals is extended to P sets or more, so that the number of input signals N can be set at a low value. There are added programmable selectors for making some of input signals into the coincidence detecting circuits replaceable with other input signals, so that the operating efficiency of PLE can be improved.

REFERENCES:
patent: 4508977 (1985-04-01), Page et al.
patent: 4524430 (1985-06-01), Page
patent: 4609838 (1986-09-01), Huang
patent: 4713557 (1987-12-01), Carter
patent: 4758745 (1988-07-01), El Gamal et al.
patent: 4774421 (1988-09-01), Hartmann et al.
Hsieh et al., "A 9000-Gate-User-Programmable Gate Array," IEEE 1988 Custom Integrated Circuits Conference, pp. 15.3.1-15.3.7, (May 16-19, 1988).
El Gamal et al., "An Architecture for Electrically Configurable Gate Arrays," IEEE 1988 Custom Integrated Circuits Conference, pp. 15.4.1-15.4.4. (May 16-19, 1988).
Principles of CMOS VLSI Design a Systems Perspective-Authors: Neil H. E. Weste and Kamran Eshraghian; Addison-Wesley Publishing Company 1985.

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