Coincidence decision circuit composed of MOS OR gate array and M

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307448, 307452, 307481, 328110, H03K 526

Patent

active

047514094

ABSTRACT:
A coincidence decision circuit includes a plurality of data inputs and at least one coincidence decision output. This circuit comprises a plurality of coincidence detection circuit each having a plurality of inputs connected to a corresponding number of data inputs selected from the data inputs of the circuit. Each of the coincidence detection circuit is selectively put in an operable condition in response to a given selection signal so as to generate an coincidence detection signal. A circuit is connected to the coincidence detection circuit to respond to a timing signal to read out the coincidence detection signal from the coincidence detection circuit put in the operable condition. Further, another circuit is connected to the read out circuit to output the coincidence detection signal at a predetermined timing.

REFERENCES:
patent: 4398101 (1983-08-01), Friauf
patent: 4501977 (1985-02-01), Koike
patent: 4502014 (1985-02-01), Bismarck
patent: 4583012 (1986-04-01), Smith et al.
patent: 4593390 (1986-06-01), Hildebrand et al.
patent: 4611133 (1986-09-01), Peterson et al.
patent: 4645944 (1987-02-01), Uya

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