Data processing: artificial intelligence – Fuzzy logic hardware – Fuzzy inference processing
Reexamination Certificate
1997-12-22
2002-07-23
Davis, George B. (Department: 2121)
Data processing: artificial intelligence
Fuzzy logic hardware
Fuzzy inference processing
C706S052000
Reexamination Certificate
active
06424958
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of coding and storing fuzzy logic rules, and to a circuit architecture for processing such rules.
Specifically but not exclusively, the invention relates to a method of coding and storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of the fuzzy variables, and at least one consequent part, is dismembered and stored into memory words for allowing subsequent processing with logic operators of the AND/OR/NOT type.
2. Discussion of the Related Art
As is well known, the structure of a fuzzy logic rule, or instruction, can be schematically expressed by the following relationship: IF condition THEN action, where the rule portion designated “condition” is also called the antecedent part, and “action” is called the consequent part.
An example of a fuzzy logic rule coding is disclosed in European Patent No. 0 544 629 to this Applicant.
As a further example, the following fuzzy rule can be considered which comprises two logic operations of the AND/OR type having two levels of priority:
IF (ing
1
is mf
3
or ing is not mf
0
) and (ing
2
is not mf
8
and ing
0
is mf
15
) THEN consequent. (1)
In fuzzy logic-based architectures, an evaluation block is provided which is referred to as the “omega” operator and is to determine the so-called “&ohgr;” weight related to the antecedent part of the fuzzy rules.
In essence, the weight &ohgr;
i
of the i-th rule is an indicator of the i-th action Z
i
to be effected, and contributes in the determination of the output value of the architecture.
For example, in the known Centroid Method, the contribution from the various “&ohgr;” weights is given as:
Σ
ω
i
*
Zi
Σ
ω
i
(
2
)
The state of the art currently proposes coding and processing fuzzy variables in parallel, but processing the pertinent fuzzy rules in a serial mode.
This solution has been adopted to produce fuzzy processors known by their trade designations W.A.R.P. 1.x and W.A.R.P. 2.0, but still shows some shortcomings, as outlined herein below.
A second prior solution proposes, on the other hand, coding and processing the fuzzy rules in parallel, but processing the respective variables in a serial mode. That is to say, the fuzzy inference rule is fully contained within one memory word. A method of this kind is that disclosed, for example, in the aforementioned European Patent No. 0 544 629 to this Applicant.
Both of these solutions have shortcomings, such as a requirement for memories having words with different lengths for different fuzzy processors. Additionally, this involves the need for memories with very long words.
Furthermore, with the fuzzy inference rule stored in a single memory word, a constraint is imposed on the number of antecedent parts, which can only be a fixed number. This results in a waste of memory locations when the inference rules have a smaller number of antecedent parts, the storing of which requires a smaller number of bits.
The underlying technical problem addressed by the present invention is the problem of providing a new methodology for coding and processing fuzzy logic inference rules, which can minimize the memory area requirements of rule coding, while affording reduced complexity of the electronic decoding circuits associated with that memory area.
The achievement of this would enable the current limitations and shortcomings to be overcome as are besetting the prior art solutions to the problem of coding and processing fuzzy logic rules.
SUMMARY OF THE INVENTION
The present invention provides a serial coding of the fuzzy rules followed by a corresponding serial processing of both the rules and the variables. In this way, the occupation of memory locations can be minimized.
Specifically, the rules are coded by a multi-word description whereby the number of words used to code each rule is a varying number tied to the number of antecedent parts in the rule.
According to one embodiment of the invention, a method of coding and storing fuzzy logic rules is disclosed, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered and stored into memory words to allow subsequent processing using logic operators of the AND/OR/NOT type, wherein the rules and variables are coded serially. Each rule is coded with a first type of memory word for each antecedent part, a second type of memory word for each consequent part and a third type of memory word if the set of rules relate to more than one output variable and the coded inference operation is the last to carry weight in the computation of the fuzzy output.
According to another embodiment of the invention, a circuit architecture for coding and storing fuzzy logic rules is disclosed, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered and stored into memory words to allow subsequent processing using logic operators of the AND/OR/NOT type. The architecture comprises a fuzzy processor connected bi-directionally to a memory where the coding of the rules and the variables is effected sequentially. The architecture further comprises a processing circuit portion for computing the alpha weight of an antecedent part of a fuzzy rule and an evaluation circuit block for computing and outputting an omega weight related to the antecedent part of the fuzzy rules, and a circuit portion provided downstream from the evaluation circuit block to process the various omega weights output by the evaluation circuit block, and outputting a fuzzy output, the circuit portion processing the omega wieghts using the Centroid Method.
According to another embodiment of the invention, a method of coding and processing a fuzzy logic rule is disclosed. The fuzzy logic rule comprises at least one antecedent part and at least one consequent part and the method comprises the steps of storing each of the at least one antecedent parts in a separate first memory byte, storing each of the at least one consequent parts in a separate second memory byte and serially processing each of the at least one antecedent parts and each of the at least one consequent parts. The method further comprises storing, in a first field of each of the first memory bytes, information which indicates a priority of order followed in the processing step, storing, in a second field of each of the first memory bytes, information which indicates a logic operation to be performed, storing, in a third field of each of the first memory bytes, an input variable on which the logic operation is performed and storing, in a fourth field of each of the first memory bytes, a membership function which determines a weighting factor for each antecedent part.
The method further comprises storing, in a fifth field of each of the first memory bytes, information which indicates whether a NOT operator is to be applied to the input variable stored in the third field of each memory byte and storing, in the second field of a final antecedent part of the fuzzy logic rule, information which indicates the presence or absence of further rules to be processed in the processing step.
According to yet another embodiment of the invention, a device for coding and processing fuzzy logic rules is disclosed. Each of the fuzzy logic rules comprises at least one antecedent, each antecedent having at least one antecedent part and a corresponding consequent, Z
i
, each consequent Z
i
having at least one consequent part, each of the at least one antecedent part and the at least one consequent part comprising a memory word. The device comprises memory means for storing a plurality of the memory words, alpha value computing means for computing an alpha value for each of the at least one antecedent parts and omega value computing means for receiving the alpha valu
Arcidiacono Liliana
Bella Dario Di
Giacalone Biagio
Pappalardo Francesco
Davis George B.
Morris James H.
SGS--Thomson Microelectronics S.r.l.
Wolf Greenfield & Sacks P.C.
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