Code error detecting circuit

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371 68, G06F 1108

Patent

active

048521035

ABSTRACT:
To reduce signal rate in connection with a code error detecting circuit for handling transmitted signals encoded in accordance with an mB1C code, the transmitted signal is divided into a plurality of p parallel signals each of which has a bit rate 1/p of the bit rate of the input signal. The number of parallel signals p is restricted to meet the condition that the product of (m+1).times.p is equal to the smallest number which is a multiple of both (m+1) and p. The parallel secondary signals are delayed relatively to one another in a manner which guarantees that the error codes contained in them coincide. The secondary signals are then exclusive ORed with one another and the exclusive ORed output is directed to an error detection circuit to detect whether an error has occurred in the input signal.

REFERENCES:
patent: 3195107 (1965-07-01), Rudolph
patent: 3409875 (1968-11-01), Jager et al.
patent: 4682334 (1987-07-01), Le Mouel et al.
patent: 4779261 (1988-10-01), Yamagishi et al.

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