Code and method for encoding data

Details Code and method for encoding data Code and method for encoding data

2002-11-15

2003-07-01

Tokar, Michael (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from nrz codes

C341S059000, C341S095000, C714S702000, C714S758000, C360S075000, C360S078070, C360S046000, C360S066000, C360S051000

Reexamination Certificate

active

06587059

ABSTRACT:

TECHNICAL FIELD
The invention relates generally to signal encoding and more particularly to a technique for encoding data for storage on a magnetic medium such as a computer disk.
BACKGROUND OF THE INVENTION
The operating speeds of peripheral computer components such as disk drives often prevent computer engineers from designing faster computer systems. The speeds of microprocessors, which are at the hearts of today's computer systems, have increased dramatically within the last few years. But the speeds of today's disk drives and semiconductor memory circuits have lagged behind. Therefore, these slower peripheral components typically limit the overall speed of a computer system because the system microprocessor must effectively “slow down” to transfer data to and from these components. That is, these slower components are the “weak link in the chain”. Fortunately, the new RAMBUS® architecture promises to make the next generation of semiconductor memory circuits as fast or faster than the next generation of microprocessors. But, there have been no speed-increasing breakthroughs of this magnitude in disk-drive technology.
Unfortunately, conventional data-encoding techniques can further reduce the already slow data-transfer rates of many disk drives. For example, many data codes are relatively inefficient, i.e., use a relatively large number of code bits per data bit, and thus may significantly reduce the effective writing speed of a disk drive. Furthermore, many data codes are poorly designed, and thus may significantly reduce the effective reading speed of a disk drive. Specifically, if the system processor initially detects a read error, then it tries to correct the error using conventional error-correction techniques. If the processor cannot correct the error using these techniques, then it instructs the disk drive to re-read the data. Unfortunately, error detection, error correction, and data re-read are time-consuming actions that can significantly reduce the effective reading speed of a disk drive.
FIG. 1
is a block diagram of a conventional disk-drive write channel
10
, which includes an encoder
12
for encoding data into a Non-Return-To-Zero-Interleave (NRZI) sequence of conventional Run-Length-Limited (RLL) code words. The write channel
10
also includes a pre-coder
14
for converting this NRZI sequence of code words into a corresponding Non-Return-To-Zero (NRZ) sequence of code words. A write-head driver circuit
16
provides the NRZ sequence of code words to a write head
18
, which writes the code words onto a magnetic storage medium
20
such as a hard disk.
Unfortunately, conventional RLL coding techniques often limit the speed at which the channel
10
can write data to the medium
20
, and thus limit the data-write speed of the disk drive containing the channel
10
and the medium
20
. As discussed below in conjunction with
FIGS. 3 and 4
, an RLL code word is often relatively inefficient, and this inefficiency limits the effective speed at which the channel
10
can write data to the medium
20
. Therefore, it is difficult if not impossible to realize significant increases in data-write speeds using conventional RLL coding techniques.
FIG. 2
is a block diagram of a conventional read channel
22
, which reads the NRZ sequence of RLL code words that the write channel
10
(
FIG. 1
) wrote to the storage medium
20
. The read channel
22
includes a read head
24
for reading the code words stored on the medium
20
and for generating a corresponding read signal. A read circuit
26
amplifies the read signal, and a Viterbi detector
28
recovers the NRZ sequence of RLL code words from the read signal. A post-coder
30
converts the recovered NRZ sequence into the corresponding NRZI sequence, and a decoder
32
decodes the NRZI sequence into the read data. Assuming there are no read errors, the recovered NRZ sequence, NRZI sequence, and read data are respectively the same as the NRZ sequence generated by the pre-coder
14
, the NRZI sequence generated by the encoder
12
, and the write data provided to the encoder
12
(FIG.
1
). Therefore, the read channel
22
is effectively the inverse of the write channel
10
.
Unfortunately, conventional RLL coding techniques often limit the speed at which the channel
22
can read data from the medium
20
, and thus limit the data-read speed of the disk drive containing the channel
22
and the medium
20
. As discussed above in conjunction with
FIG. 1
, an RLL code word is relatively inefficient, and this inefficiency limits the effective speed at which the channel
22
can read data from the medium
20
. Furthermore, as discussed below in conjunction with
FIGS. 3 and 4
, an RLL code word may significantly degrade the signal-to-noise ratio (SNR) of the data-read signal. Unfortunately, this inefficiency and the degraded SNR limit the effective speed at which the channel
22
can read data from the medium
20
. Therefore, it is difficult if not impossible to realize significant increases in data-read speed using conventional RLL coding techniques.
In conjunction with
FIGS. 3-10
, a general discussion of conventional data read/write and encoding techniques is included to assist the reader in understanding the subsequently discussed inventive concepts. Numerous detailed discussions of these conventional techniques are included in available references such as “Digital Baseband Transmission” by Jan W. Bergmans.
Referring to
FIGS. 3 and 4
, conventional RLL encoding techniques and code words are discussed. Generally, RLL code words are stored on a computer disk instead of data words because the code words can be selected to have desirable parameters that the data words will not always have. As discussed below, the read channel
22
(
FIG. 2
) depends on these parameters for proper operation.
FIG. 3
is a data word
40
and its equivalent RLL code word
42
. The word
40
includes data bits D
0
-D
a
, and the code word
42
includes code bits C
0
-C
b
and is compatible with an x/y RLL (d/k) code. The parameter x/y is the efficiency of the RLL code, and indicates that the code word
42
encodes x=a+1 data bits with y=b+1 code bits. Therefore, the higher the ratio x/y, the fewer the number of code bits that are written and read for each data bit, and thus the faster the data-write and data-read speeds for a given number of data bits. Conversely, the lower the ratio x/y, the greater the number of code bits that are written and read for each data bit, and thus the slower the data-write and data-read speeds for a given number of data bits. The parameter d is the minimum number of code bits C required between consecutive code-bit transitions, and the parameter k is the maximum number of code bits C allowed between consecutive code-bit transitions. For example, binary code sequences 01 and 10 include 0-to-1 and 1-to-0 code-bit transitions, respectively, and an x/y RLL (0/7) code may include the binary sequence 101000000001, which respectively includes 0 bits (minimum) and 7 bits (maximum) between consecutive code-bit transitions. The Viterbi detector
28
(
FIG. 1
) includes a state machine having a structure based on the responses of the portion of the read channel
22
that includes the read head
24
and read circuit
26
, and possibly on the state sequence of the code if such a state sequence exists. Furthermore, the detector
28
or a separate clock detector (not shown) uses the code-bit transitions to synchronize a read clock signal for sampling the read signal from the read head
24
.
FIG. 4
shows the first three code words
42
a
,
42
b
, and
42
c
of a code sequence
44
, which is compatible with an 8/9 RLL (0/7) code. Because d=0, there need be no code bits between code-bit transitions. That is, the sequence
44
can have consecutive code-bit transitions such as in the binary series 010101. To insure that the sequence
44
never has more than k=7 code bits between consecutive code-bit transitions, each code word
42
a
-
42
c
is selected to have at least one respecti

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