Coaxial dual pin sockets for high speed I/O applications

Details Coaxial dual pin sockets for high speed I/O applications Coaxial dual pin sockets for high speed I/O applications

2001-12-21

2004-08-24

Nasri, Javaid H. (Department: 2839)

Electrical connectors

Electromagnetic or electrostatic shield

Multi-part shield body

C439S063000

Reexamination Certificate

active

06780057

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention generally relates to printed wiring board sockets. More particularly, the invention relates to a socket having a grounding fence for enhanced performance.
2. Discussion
In the highly competitive computer industry, the trend toward higher processing speeds and increased functionality is well documented. While this trend is desirable to the consumer, it presents significant challenges to circuit designers as well as manufacturers. A particular area of concern relates to the socket that often provides interconnection between the semiconductor package and the printed wiring board (PWB). The socket enables an integrated circuit (IC) such as a computer processor to communicate with other components resident on the motherboard such as the main system memory, the basic input and output system (BIOS) and the motherboard chipset itself. While a number of sockets and slots have been developed over the years in order to facilitate this interconnection, the increasing speed of input/output (I/O) signaling in processor applications has presented a number of difficulties to industry participants.
One particular difficulty relates to crosstalk, which can result from electromagnetic interference (EMI) between I/O pins. While the conventional approach to reducing crosstalk has been to increase the number of ground pins, this solution reduces the number of pins available for signal transmission for a given amount of real estate. Thus, the conventional solution has been to increase the total number of socket pins in order to maintain a minimum signal pin to ground pin (S/G) ratio. Such an approach can be costly not only in terms of actual dollar cost for the extra pins, but also for the real estate needed for the extra pins.
FIG. 7
shows a conventional socket
10
wherein a base
12
has a plurality of signal contacts
14
and a plurality of ground contacts
16
. It will be appreciated that typically a great deal of attention is paid to the arrangement and allocation of ground contacts
16
versus signal contacts
14
in order to reduce the effects of crosstalk, “ground bounce” and other performance related phenomena.


REFERENCES:
patent: 4720770 (1988-01-01), Jameson
patent: 4871316 (1989-10-01), Herrell et al.
patent: 5399104 (1995-03-01), Middlehurst et al.
patent: 6152747 (2000-11-01), McNamara
patent: 6164999 (2000-12-01), McCutchan et al.
patent: 6347962 (2002-02-01), Kline
patent: 6368121 (2002-04-01), Ueno et al.
patent: 6506076 (2003-01-01), Cohen et al.

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