Coarse delay tuner circuits with edge suppressors in delay...

Details Coarse delay tuner circuits with edge suppressors in delay... Coarse delay tuner circuits with edge suppressors in delay...

2007-07-24

2007-07-24

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

10538378

ABSTRACT:
The invention discloses a delay locked loop which includes a coarse delay tuner circuit with edge suppressors suitable for use with delay locked loops (DLLs). The disclosed tuner circuit provides reduced lock time of the DLL circuit.

REFERENCES:
patent: 5845572 (1998-12-01), Cronin et al.
patent: 5920221 (1999-07-01), Shen et al.
patent: 6950488 (2005-09-01), Chung et al.

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