Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
2000-06-27
2003-05-13
Rose, Robert A. (Department: 3723)
Abrading
Abrading process
Glass or stone abrading
C451S057000
Reexamination Certificate
active
06561876
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-181545, filed Jun. 28, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
This invention relates to a CMP (Chemical Mechanical Polishing) method for flattening a film formed on a semiconductor substrate by polishing the film by means of the CMP, and in particular, to a novel abrasive grain to be included in an abrasive agent to be employed for the polishing.
In a wafer treatment process of a semiconductor device such as IC or LSI, the employment of an etch-back RIE (Reactive Ion Etching) has been known for flattening the surface of wafer, i.e. the process being performed in such a way that after a trench or contact hole of the wafer is filled with an optional material such as a metal, polycrystalline silicon, a silicon oxide (SiO
2
) film, etc., the resultant surface is flattened by means of the RIE.
However, this etch-back RIE method is accompanied with various problems that it involves a step of coating an etch-back resist thus increasing the number of steps, that the surface of wafer is vulnerable to RIE damage, that it is difficult to achieve an excellent flattening, that it requires the employment of a vacuum system thereby complicating the structure of apparatus, and that it involves the employment of a dangerous etching gas.
Accordingly, as a flattening method of the surface of semiconductor substrate, a CMP method employing a polishing apparatus is increasingly employed recently, substituting for the conventional etch-back RIE method.
In recent years, for the purpose of further enhancing the integration and performance of a semiconductor device such as LSI, various fine processing techniques have been studied and developed. The aforementioned CMP method is one of the techniques which are now being developed for meeting such severe demands for increasingly finer working technique, and is a technique which is indispensable in the flattening of an interlayer insulating film or in the step of isolating buried elements.
One of important issues in this CMP method is how to prevent the dishing of a film to be polished. With a view to solve this problem, there has been proposed to incorporate a surfactant, which is an organic compound exhibiting a very strong interaction with the film, into an abrasive agent, thereby suppressing the dishing of the film. However, since the surfactant that has been added to an abrasive agent inevitably exerts a strong interaction also to the abrasive grain, the surface of the abrasive grain is covered with the organic compound, thereby raising the problem that the polishing speed will be prominently deteriorated.
The polishing apparatus generally comprises an abrasive disc provided on the surface thereof with an abrasive cloth and adapted to be rotated by means of motor, and an adsorption disc which is designed to rotatably support a substrate such as a semiconductor wafer and also designed to press the substrate being rotated onto the abrasive disc. The polishing of the substrate by making use of a polishing apparatus constructed as described above can be generally performed as follows. Namely, the surface to be polished (or polishing surface) of the substrate being rotated is pressed onto the abrasive cloth attached to the surface of abrasive disc being rotated, and under this condition, the polishing is continued while feeding an abrasive agent to the working portion of the abrasive cloth.
As for the abrasive grain to be included in the abrasive agent, it is possible to employ ceria (cerium oxide), silica (silicon oxide), silicon nitride (Si
3
N
4
), etc. After a CVD oxide film for instance is formed on the surface of semiconductor substrate so as to fill up or bury a recessed portion having a stopper film and formed in the surface of semiconductor substrate, the CVD oxide film is polished using the aforementioned polishing apparatus until the stopper film is exposed, thereby completely flattening the buried CVD oxide film.
The CMP treatment for polishing a film formed on a semiconductor substrate by making use of this polishing apparatus has been conventionally performed as follows. Namely, a treating film such as an oxide film formed on the surface of semiconductor substrate is polished until the film is thinned to a predetermined thickness, thereby completely flattening the film. After this polishing of the semiconductor substrate is finished, water is fed, substituting for the abrasive agent, to the surface of semiconductor substrate so as to perform a post-polishing of the semiconductor substrate, thereby finishing the entire process of the CMP treatment for flattening the surface of each semiconductor substrate.
The abrasive agent (or abrasive slurry) that has been conventionally employed is composed of an abrasive grain such as ceria (cerium oxide (CeO
2
)) or silica (SiO
2
) which is dispersed in a solvent such as pure water or ultra-pure water. As required, a surfactant comprising an organic compound is also added to this abrasive agent.
Even in this CMP method, there is a problem as mentioned above that due to a strong interaction to the abrasive grain of an organic compound that has been added as a surfactant to the abrasive agent, the surface of the abrasive grain is covered with the organic compound, thereby prominently deteriorating the polishing speed. Specifically, as shown in
FIG. 1A
, since the surface potential (or zeta potential) of the conventional abrasive grain (CeO
2
) is positive, the organic compound added as a surfactant to the abrasive agent and having minus potential is caused to adhere all over the surface of the abrasive grain, thereby preventing the abrasive grain from functioning its inherent property.
By the way, the polarity of zeta potential (an electric potential formed traversing the interface between a solid and a liquid) existing on the surface of silicon semiconductor substrate or on the surface of abrasive grain that has been adhered to a treating film or a semiconductor substrate can be altered depending on pH. Specifically, as shown in the graph of
FIG. 11
explaining the pH dependency of zeta potential, an abrasive agent comprising ceria grain as an abrasive grain would be negative in zeta potential if pH is not less than 7, but would be positive in zeta potential if pH is less than 7. Whereas, an abrasive agent comprising silica grain as an abrasive grain would be negative in zeta potential if pH is not less than 4.8, but would be positive in zeta potential if pH is less than 4.8.
In the operation of a polishing apparatus for performing the aforementioned CMP treatment, various kinds of abrasive agents are employed depending on the kinds of treating film formed on the surface of semiconductor substrate. Further, depending on the kinds of abrasive grain to be included in an abrasive agent, the zeta potential existing thereon would be varied. As explained above, the zeta potential is also dependent on pH.
BRIEF SUMMARY OF THE INVENTION
Therefore, an object of this invention is to provide a CMP method of a treating film (a film to be treated) formed on a semiconductor substrate, the method being featured in that the adsorption of a surfactant to an abrasive grain would become a weak physical adsorption, that the surfactant can be easily desorbed from the abrasive grain on the occasion of polishing, that the function of the abrasive grain can be sufficiently ensured thereby making it possible to achieve a higher polishing speed as compared with the conventional polishing, and that an excellent flattening performance can be achieved.
Another object of this invention is to provide an apparatus of manufacturing a semiconductor for executing the aforementioned method.
According to this invention, there is provided a CMP method for polishing and flattening a film (a film to be polished) having a rugged surface and formed on a surface of semiconductor substrate by making use of an abrasive cloth while
Hirano Tomoyuki
Tateyama Yoshikuni
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Rose Robert A.
LandOfFree
CMP method and semiconductor manufacturing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with CMP method and semiconductor manufacturing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMP method and semiconductor manufacturing apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3071201