CMOS winner-take all circuit with offset adaptation

Details CMOS winner-take all circuit with offset adaptation CMOS winner-take all circuit with offset adaptation

1991-02-05

1992-09-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307351, 323316, 365185, H03K 1756, H03K 1760

Patent

active

051461064

ABSTRACT:
An adaptable MOS winner take all circuit includes a plurality of adaptable current mirrors. Each adaptable current mirror includes a floating node onto which and from which electrons may be transported by control signals and electrical semiconductor structures. Electrons may be placed onto and removed from a floating node associated with at least one MOS insulated gate field effect transistor, usually the gate of the transistor, in an analog manner, by application of first and second electrical control signals. A first electrical control signal controls the injection of electrons onto the floating node from an electron injection structure and the second electrical control signal controls the removal of electrons from the floating node by an electron removal structure.

REFERENCES:
patent: 4403192 (1983-09-01), Williman
patent: 4767979 (1988-08-01), Tanigawa
patent: 4799195 (1989-01-01), Iwahashi et al.
patent: 4935702 (1990-06-01), Mead et al.

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