CMOS well switching circuit

Details CMOS well switching circuit CMOS well switching circuit

1992-11-23

1994-12-06

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327546, 327541, 327389, 327434, 326112, H03K 301, H03K 17687, H03K 19094, H01L 2500

Patent

active

053714199

ABSTRACT:
A circuit for switching the well in a CMOS circuit to one of two power supply rails. In, for example, an N-well CMOS process, when an output is driven by a PMOS pull-up transistor, the P+ (drain of the PMOS) to N-well junction may be forward biased if the rail drops to ground. This will cause the output to be pulled to ground. The switching circuit of the present invention avoids the grounding of the output by automatically switching the N-well to the higher power supply rail so that grounding the rail would not cause the output to fall. MOS switches connect the well to either of the power supplies. Therefore, there is no voltage drop from the power supply to the well as in the case of switching circuits using diodes. Also, this circuit connects the well to the highest power supply regardless of which power supply drops to ground. Therefore, it does not require one power supply to be always on for proper operation. A similar P-well design of the switching circuit would provide the same protection for an output drive circuit with an NMOS pull-down transistor.

REFERENCES:
patent: 4752700 (1988-06-01), Boyacigiller
patent: 4791318 (1988-12-01), Lewis et al.
patent: 4837460 (1989-06-01), Uchida
patent: 5157281 (1992-10-01), Santin et al.

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