CMOS voltage translator

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307200B, 307297, 307304, 323314, H03K 19092, H03K 301, H03K 3353, H01L 902

Patent

active

046755578

ABSTRACT:
A voltage translator circuit is provided to reduce a supply voltage to a lower, predetermined, relatively constant and unconditionally stable operating voltage without the use of external components. A voltage divider comprising a plurality of series connected CMOS FETs located in P-regions, is used to establish an operating voltage. Additional CMOS FETs are used to supply the load current and control the no-load voltage.

REFERENCES:
patent: 4300061 (1981-11-01), Mihalich et al.
patent: 4380710 (1983-04-01), Cohen et al.

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