CMOS Voltage regulator circuit

Details CMOS Voltage regulator circuit CMOS Voltage regulator circuit

1979-03-15

1981-11-10

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

323313, 357 42, G05F 308, G05F 316, H01L 2704, H01L 2978

Patent

active

043000614

ABSTRACT:
A CMOS integrated circuit chip includes a conventional high voltage section and a low voltage section. An on-chip voltage regulator develops a second or pseudo substrate potential at a node that is regulated to a level that is the sum of the thresholds for NMOS and PMOS devices below the V.sub.DD potential. The low voltage section is connected between V.sub.DD and the second substrate potential node. The low voltage section is, therefore, always operated at optimum voltage regardless of device threshold voltage variations that are encountered in CMOS manufacturing. This means that even though the integrated circuit includes a low voltage section, it can be operated over the normal CMOS voltage range as if it contained only high voltage devices.

REFERENCES:
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patent: 3823332 (1974-07-01), Feryszka et al.
patent: 3983620 (1976-10-01), Spadea
patent: 4006491 (1977-02-01), Alaspa et al.
patent: 4024415 (1977-05-01), Matsuura
patent: 4096430 (1978-06-01), Waldron
patent: 4100437 (1978-07-01), Hoff, Jr.
patent: 4128816 (1978-12-01), Shimotsuma
patent: 4217535 (1980-08-01), Suzuki et al.
patent: 4217540 (1980-08-01), Shimotsuma

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