CMOS voltage reference with stacked base-to-emitter voltages

Details CMOS voltage reference with stacked base-to-emitter voltages CMOS voltage reference with stacked base-to-emitter voltages

1990-09-28

1992-06-30

Stephan, Steven L.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323314, 3072961, 3072968, 36518909, G05F 324

Patent

active

051266539

ABSTRACT:
A band-gap voltage reference forming part of a CMOS IC chip. A .DELTA.V.sub.BE voltage is developed by stacked pairs of parasitic bipolar transistors, with the transistors of each pair operated at different current densities. MOS buffer transistors are connected at corresponding ends of the stacks where the .DELTA.V.sub.BE voltage is developed. The bipolar transistors are driven by MOS current sources.

REFERENCES:
patent: 4622512 (1986-11-01), Brokaw
patent: 4896094 (1990-01-01), Greaves et al.
Michejda and Kim, JSSC, Dec. '84, p. 1015.
Kuijk, JSSC Jun. '73, pp. 223-226.
Gray and Meyer, "Analysis & Design of Analog Integrated Circuits", pp. 734, 735.

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