Active solid-state devices (e.g. – transistors – solid-state diode – Voltage variable capacitance device – With specified dopant profile
Reexamination Certificate
2001-12-28
2004-11-30
Nadav, Ori (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Voltage variable capacitance device
With specified dopant profile
C257S595000
Reexamination Certificate
active
06825546
ABSTRACT:
FIELD
The subject matter herein relates to a varactor with a linear capacitance to voltage (CN) response, i.e. a constant dC/dV characteristic. More specifically, the subject matter herein relates to a varactor having a retrograde dopant profile in a diode junction depletion region resulting in the linear CN response.
BACKGROUND
A varactor is a capacitor for which its capacitance changes with applied voltage. Varactors are commonly used in broadband RF (radio frequency) applications. A diode junction is commonly used to form a varactor in an integrated circuit (IC), since the depletion region of the diode acts as a capacitor dielectric between two capacitor plates. Semiconductor material in the depletion region is typically doped either uniformly (e.g. at a dopant concentration of 1.0E16/cm
3
at room temperature) or decreasing with depth.
As a reverse bias voltage is applied to the varactor, the width of the depletion region increases, thereby decreasing the capacitance. This effect (i.e. capacitance/voltage response) is illustrated in a capacitance/voltage plot
100
for a typical varactor shown in FIG.
1
. The plot
100
is distinctly nonlinear. The nonlinearity of the capacitance/voltage response affects (often negatively) the performance of the varactor and, therefore, the design of the varactor and the overall IC.
Additionally, semiconductor junctions commonly experience leakage current, resulting in resistances associated with (in this case) the varactor. Schematically, this resistance is in parallel with the variable capacitance of the varactor. There is also typically a series resistance associated with the varactor. Both resistances are typically undesirable because they can adversely affect the performance of the varactor and, therefore, the design of the varactor and the overall IC.
It is with respect to these and other background considerations that the subject matter herein has evolved.
SUMMARY
The subject matter described herein involves a varactor formed from a diode junction with a retrograde dopant profile in the depletion region of the diode junction. In other words, the dopant concentration increases, rather than decreases or remains constant, with the depth of the depletion region. In this manner, the resulting capacitance/voltage response characteristic of the varactor is more nearly linear than in the prior art.
In one particular embodiment, the dopant concentration N as a function of the depth x of the depletion region (i.e. the dopant profile) is given by the equation N=Bx
m
, where B is a concentration constant (e.g. 1.0E16/cm
3
, or in a range from 1.0E13/cm
3
to 1.0E19/cm
3
, depending on the application) and m is an exponent that determines the degree of curvature, or variation, of the dopant profile. In this embodiment, a greater exponent m typically results in a greater degree of curvature of the dopant profile and a more linear capacitance/voltage response characteristic.
Additionally, in a particular embodiment, since the dopant concentration increases away from the diode junction, the peak of the dopant concentration is at a level outside the depletion region and is not cut off from an external contact for the varactor. Thus, the peak region of the dopant concentration acts as a low resistance connection for the varactor, resulting in a lower parasitic series resistance associated with the varactor than in the prior art.
A more complete appreciation of the present disclosure and its scope, and the manner in which it achieves the above noted improvements, can be obtained by reference to the following detailed description of presently preferred embodiments taken in connection with the accompanying drawings, which are briefly summarized below, and the appended claims.
REFERENCES:
patent: 3638300 (1972-02-01), Foxhall et al.
patent: 3914708 (1975-10-01), Stover et al.
patent: 4064620 (1977-12-01), Lee et al.
patent: 4226648 (1980-10-01), Goodwin et al.
patent: 4954850 (1990-09-01), Kasahara
patent: 5506442 (1996-04-01), Takemura
patent: 6653716 (2003-11-01), Vashchenko et al.
Sze,Physics of Semiconductor Devices, 2ndEdition John Wiley, 1981, describing varactor operation, 3 pages.
Randazzo Todd A.
Walker John Q.
John R. Ley, LLC
LSI Logic Corporation
Nadav Ori
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