CMOS transistor spacers formed in a BiCMOS process

Details CMOS transistor spacers formed in a BiCMOS process CMOS transistor spacers formed in a BiCMOS process

2006-01-31

2006-01-31

Lee, Hsien-Ming (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Bipolar transistor

C257S273000, C257S552000, C257S555000, C438S313000, C438S340000

Reexamination Certificate

active

06992338

ABSTRACT:
According to an exemplary method in one embodiment, a transistor gate is fabricated on a substrate. Next, an etch stop layer may be deposited on the substrate. The etch stop layer may, for example, be TEOS silicon dioxide. Thereafter, a conformal layer is deposited over the substrate and the transistor gate. The conformal layer may, for example, be silicon nitride. An opening is then etched in the conformal layer. Next, a base layer is deposited on the conformal layer and in the opening. The base layer may, for example, be silicon-germanium. According to this exemplary embodiment, an emitter may be formed on the base layer in the opening. Next, the base layer is removed from the conformal layer. The conformal layer is then etched back to form a spacer adjacent to the transistor gate. In one embodiment, a structure is fabricated according to the above described exemplary method.

REFERENCES:
patent: 5124271 (1992-06-01), Havemann
patent: 6001701 (1999-12-01), Carroll et al.
patent: 6746928 (2004-06-01), Schuegraf et al.
patent: 6838349 (2005-01-01), Yamauchi

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