CMOS transconductor with increased dynamic range

Details CMOS transconductor with increased dynamic range CMOS transconductor with increased dynamic range

2001-11-27

2003-06-10

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting input voltage to output current or vice versa

C327S065000, C327S077000, C327S563000, C330S253000

Reexamination Certificate

active

06577170

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention is generally related to the field of communications and, more particularly, to a CMOS transconductor with increased dynamic range.
BACKGROUND OF THE INVENTION
Complementary metal-oxide semiconductor (“CMOS”) transconductors have a wide range of applications in the field of communications, among other fields. CMOS transconductors, also known as voltage-to-current (“V-I”) converters, are employed, for example, in various circuits of communications systems, such as intermediate frequency (“IF”) transmitters and receivers. Another example of an application of CMOS transconductors is in IF filter circuits, also utilized in communications systems, such as frequency selective networks made up of CMOS transconductors and capacitors.
A typical configuration of a CMOS transconductor circuit
100
, as is known in the art, is shown in FIG.
1
. As shown, the CMOS transconductor circuit
100
includes several components. The transconductor circuit
100
includes several CMOS field-effect transistors (“MOSFETs”). The MOSFETs
102
-
106
are electrically interconnected in a configuration that provides voltage to current conversion between the inputs
108
,
109
and outputs
110
,
111
of the transconductor circuit
100
.
The transconductor circuit
100
includes two voltage input terminals
108
,
109
that connect to the gate terminals of the MOSFETs
104
and
105
respectively, as shown. These MOSFETs
104
,
105
accordingly make up the input stage
101
of the transconductor circuit
100
. Also as shown, the transconductor circuit
100
includes two current output terminals
110
,
111
that connect at the nodes between the drain terminals of MOSFETs
102
and
104
and between the drain terminals of MOSFETs
103
and
105
, respectively, of the transconductor circuit
100
.
Finally, the transconductor circuit
100
includes a voltage supply rail
112
which provides a voltage to the transconductor circuit
100
via the source terminals of MOSFETs
102
,
103
. Also, the transconductor circuit
100
includes a ground
118
electrically connected to the source terminal of MOSFET
106
which may consist of, for example, a terminal connected to a common ground point in the transconductor circuit
100
. Further, the transconductor circuit
100
includes MOSFET bias inputs
114
,
115
that provide a bias signal to MOSFETs
102
,
103
,
106
via their respective gate terminals.
A CMOS transconductor or V-I converter, such as the transconductor circuit
100
described above, has several basic operating characteristics, as is known in the art, which are described in the following. The input linear range (“V
in,max
”) of a CMOS transconductor is the maximum input voltage at which the transconductor can still perform substantially linear voltage-to-current conversion. The transconductance value (“gm”) of a CMOS transconductor is a value that is approximately equivalent to the ratio of the output current (“I
out
”) to the input voltage (“V
in
”) of the transconductor. The total integrated output noise current (“I
n,rms
”) is the noise current produced by a CMOS transconductor integrated over a given bandwidth. This characteristic determines the minimum resolvable output signal of the transconductor and is also referred to as the minimum detectable output current. The power consumption (or power dissipation) of a CMOS transconductor is proportional to the bias current (“I
bias
”) for a class-A transconductor.
A CMOS transconductor also has the basic operating characteristic values of input impedance, output impedance, 3 dB bandwidth, and minimum-required voltage headroom (“voltage headroom”) (i.e., the capability of the transconductor to operate from low supply voltages), which are understood in the art. Further, the maximum output current (“I
out,max
”) of a CMOS transconductor can be defined as the product of the transconductance value times the input linear range. Finally, a CMOS transconductor has the basic operating characteristic value of the dynamic range (“DR
V-I
”), which is defined as the ratio between the maximum signal and the minimum signal that the transconductor can reliably process. The dynamic range can be determined by the ratio of the maximum output current to the minimum detectable output current, that is:
DR
V
-
I
=
20
×
log
10
×
(
gm
×
V
in
,
max
2
×
i
n
,
rms
)
,
ⅆ
B
Eq
.
 
⁢
1
An important goal in the design of circuits utilizing CMOS transconductors is to obtain a high dynamic range. Typically this can be achieved by paralleling one or more CMOS tranconductors that are utilized in a circuit. However, this “brute force” approach to increasing the dynamic range of the circuit has the significant consequence of increasing the power consumption and chip area of the circuit. For example, for every 3 dB increase in dynamic range achieved by adding a transconductor in parallel to a circuit, there is a 6 dB increase in power consumption of the circuit and a corresponding increase in chip area to facilitate the added transconductor.
Thus, a need exists for a CMOS transconductor with increased dynamic range that does not suffer from the increased power consumption and chip area requirements of prior art transconductor circuits.
SUMMARY OF THE INVENTION
The present invention provides a CMOS transconductor that operates with increased dynamic range while maintaining one or more other basic operating characteristics at substantially the same value in comparison to a prior art transconductor circuit.
Briefly described, in architecture, one embodiment of the present invention, among others, can be implemented as an input stage circuit comprising several pluralities of transistors with each plurality of transistors configured such that certain terminals of the transistors are electrically connected, and the several pluralities of transistors are also electrically interconnected through one or more terminals of each plurality of transistors.
The present invention can also be viewed as providing methods for providing a CMOS transconductor that operates with increased dynamic range while maintaining substantially the same other basic operating characteristics in comparison to a prior art transconductor circuit. In this regard, one embodiment of a method of the present invention, among others, can be broadly summarized by the step of modifying an input stage of an existing transconductor circuit to provide a transconductor circuit that operates with increased dynamic range while maintaining one or more other basic operating characteristics at substantially the same value in comparison to the existing transconductor circuit.
Other features and advantages of the present invention will be or become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional features and advantages be included within this description, be within the scope of the present invention, and be protected by the accompanying claims.


REFERENCES:
patent: 5561396 (1996-10-01), Hogervorst et al.
patent: 5602509 (1997-02-01), Kimura
patent: 6380805 (2002-04-01), Bily et al.
patent: 6420912 (2002-07-01), Hsu et al.
Vladimir Prodanov, George Palaskas, Jack Glas, Vito Boccuzzi, “A CMOS AGC-less IF Strip for Bluetooth,” Sep. 19, 2001 European Solid State Circuit Conference, pp. 1-4.

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