CMOS to ECL/CML level converter

Details CMOS to ECL/CML level converter CMOS to ECL/CML level converter

1990-09-04

1992-06-16

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307443, H03K 190175

Patent

active

051226898

ABSTRACT:
A signal level converter for converting digital input signal levels to CML or ECL output signal levels upon an input signal level rise greater than an output signal level rise, includes a load resistor having first and second terminals. A current path is disposed between the first terminal of the load resistor and a first supply voltage potential. The second terminal of the load resistor is connected to a second supply voltage potential for CML or ECL output signal levels to form a digital H level. The first terminal of the load resistor forms a converter output for CML output signal levels and/or a bipolar transistor is connected as an emitter follower having a base electrode connected to the first terminal of the load resistor and an emitter electrode forming a converter output for ECL output signal levels. A current source field transistor is connected in the current path and forms a constant current source. A switching element is connected in the current path and includes at least one control field effect transistor having a gate electrode forming a converter input.

REFERENCES:
patent: 4517476 (1985-05-01), Barre
patent: 4615951 (1987-02-01), Uragami
patent: 4849660 (1989-07-01), Hayashi et al.
patent: 4977338 (1990-12-01), Miyaoka et al.
Integrated Electronics: Analog and Digital Circuits and Systems; (Millman et al) 1972; pp. 336-338.

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