CMOS switch circuit having concurrently switching...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S376000, C327S387000, C327S416000, C327S309000, C327S108000, C327S257000, C326S083000

Reexamination Certificate

active

06304111

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to CMOS switch circuits and in particular, to a CMOS switch circuit having concurrently switching complementary outputs independent from process variation.
BACKGROUND OF THE INVENTION
CMOS switch circuits having complementary outputs are useful in circuit applications such as driving the control inputs of a transmission gate. In such and other applications, it is desirable for the complementary outputs to switch concurrently to minimize noise injection into the circuit.
In a conventional method of designing a CMOS switch circuit, the circuit is optimized for concurrent switching during computer simulation employing timing models associated with nominal process parameters. In practice, however, process variations during manufacture are inevitable. Accordingly, switching of the complementary outputs of such manufactured CMOS switch circuits may be less than concurrent.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a CMOS switch circuit having concurrently switching complementary outputs.
Another object is to provide a CMOS switch circuit having concurrently switching complementary outputs independent from process variation.
These and additional objects are accomplished by the various aspects of the present invention, wherein briefly stated, one aspect is a CMOS switch circuit having concurrently switching complementary outputs. The CMOS switch circuit includes a first stage having PMOS and NMOS transistors arranged and properly sized to provide substantially concurrently switching complementary outputs. Preferably, it also includes a second stage having PMOS and NMOS transistors arranged and related to counterparts in the first stage so as to provide substantially concurrently switching complementary outputs that are substantially process independent.
Another aspect is a method of forming a CMOS switch circuit having concurrently switching complementary outputs, comprising forming a first stage having PMOS and NMOS transistors arranged and properly sized to provide substantially concurrently switching complementary outputs. Preferably, the method also includes forming a second stage having PMOS and NMOS transistors arranged and related to counterparts in the first stage so as to provide substantially concurrently switching complementary outputs that are substantially process independent.
Additional objects, features and advantages of the various aspects of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5315187 (1994-05-01), Cheng
patent: 5369316 (1994-11-01), Chen et al.
patent: 5491432 (1996-02-01), Wong et al.
patent: 5506528 (1996-04-01), Cao et al.
patent: 5739713 (1998-04-01), Sharpe-Geisler
patent: 5929654 (1999-07-01), Park et al.
patent: 6225847 (2001-05-01), Kim

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