CMOS Structure incorporating vertical IGFETS

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 234, 357 237, 357 4, 357 2314, 365182, 307279, H01C 2702, H01C 2978, H01C 2701

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045660255

ABSTRACT:
A CMOS device incorporates a plurality of interconnected vertical IGFETs on a substrate. An insulated gate electrode is located on the substrate surface and a pair of monocrystalline silicon regions extend from the substrate surface such that each of the monocrystalline silicon regions is contiguous with a portion of the insulated gate electrode. One of the monocrystalline regions has a body region of first conductivity type and the other monocrystalline region has a body region of second conductivity type. Both of the body regions are located with respect to the insulated gate electrode such that an inversion channel can selectively be created in one of the body regions by applying a predetermined voltage to the insulated gate electrode.

REFERENCES:
patent: 3518509 (1970-06-01), Cullis
patent: 3564358 (1971-02-01), Hahnlein
patent: 3859716 (1975-01-01), Tihanyi
patent: 3893155 (1975-07-01), Ogiue
patent: 4262340 (1981-04-01), Sasaki et al.
patent: 4412868 (1983-11-01), Brown
patent: 4487639 (1984-12-01), Lam
IEEE Electron Device Letters, Jun. 1980, pp. 117, 118 by Gibbons.

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