CMOS structure for eliminating latch-up of parasitic thyristor

Details CMOS structure for eliminating latch-up of parasitic thyristor CMOS structure for eliminating latch-up of parasitic thyristor

1991-02-19

1992-08-25

Hille, Rolf

357 16, 357 231, 357 63, H01L 2702

Patent

active

051426412

ABSTRACT:
A complementary metal oxide semiconductor device comprises a substrate made of a first semiconductor material doped to a first conductivity type, a first field effect transistor including a first channel region defined in the substrate, a first source region provided on the substrate, a first drain region provided on the substrate and a gate electrode provided on the the substrate above the first channel region, a well defined in the substrate in an area excluding the first field effect transistor, a second field effect transistor including a second channel region defined in the well, a second source region provided on the well, a second drain region provided on the well, and a second gate electrode provided on the the well above the second channel region, wherein at least one of the first and second source regions is made of a semiconductor material having a band gap substantially narrower than the band gap of the first semiconductor material.

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