CMOS static memory cell

Details CMOS static memory cell CMOS static memory cell

1985-12-13

1986-09-23

Edlow, Martin H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 2311, 357 52, 357 59, 365154, 365156, 365188, H01L 2702, H01L 2978

Patent

active

046138862

ABSTRACT:
A CMOS static memory cell comprising a bistable circuit is described. A grounded p-type region separates the p-channel transistors of the circuit from the n-channel transistors. This p-type region reduces latch up problems and permits polysilicon lines to be routed over the region. The resultant memory cell is of higher density than prior art cells.

REFERENCES:
patent: 4035826 (1977-07-01), Morton et al.
patent: 4047284 (1977-09-01), Spadea
patent: 4282648 (1981-08-01), Yu et al.
patent: 4295897 (1981-09-01), Tubbs et al.
patent: 4458262 (1984-08-01), Chao
patent: 4481524 (1984-11-01), Tsujide
Dingwall et al., I.E.D.M., Wash. D.C., Dec. 4, 5, 6, 1978, pp. 193-196.

Affiliated with

Also associated with

Rating

CMOS static memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS static memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS static memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-768829