CMOS sense amplifier with isolated sensing nodes

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

307443, 307496, 307350, 365205, H03K 3356, H03K 1704

Patent

active

047163208

ABSTRACT:
A CMOS sense amplifier is disclosed which has the capacitance of the bit lines isolated from the sensing nodes, which allows the sensed differential voltage to be amplified faster than in current CMOS sense amplifiers, since the sensing nodes have significantly lower capacitance than the bit lines. The isolation is achieved by connecting the bit lines to only the gates of the upper transistors of the cross-coupled inverters, and by coupling the gates of the lower transistors to the common nodes of the inverters (i.e., the sensing nodes of the sense amplifier). In this way, the bit line voltages causes the cross-coupled inverters to begin switching based on the upper transistor of the inverter coupled to the bit line with the lower voltage being more conductive than the upper transistor of the other inverter; the cross-coupled arrangement of the lower transistor gates to the sensing nodes causes the required amplification and latching action. The bit lines are restored by means of an additional CMOS inverter, for each bit line, where the input of the inverter is connected to the sensing node, and its output is connected to the bit line. Once the differential voltage is amplified at the sensing nodes, the additional inverters drive the bit lines in order to restore the sensed data state at the storage cell.

REFERENCES:
patent: 3882326 (1975-05-01), Kruggel
patent: 4031522 (1977-06-01), Reed et al.
patent: 4169233 (1979-09-01), Haraszti
patent: 4274013 (1981-06-01), Clemons et al.
patent: 4521703 (1985-06-01), Dingwall
Towler, "Low Input Capacitance Sense Amplifier", IBM T.D.B., vol. 26, No. 7A, Dec. 1983, pp. 3124-3125.
Boysel et al, "Multiphase Clocking Achieves 100-Nsec MOS Memory", Electronic Design News, Jun. 10, 1968, pp. 50-54.
Chin et al, "Sense Latch for One-Device Memory Cell", IBM T.D.B., vol. 15, No. 11, Apr. 1973, pp. 3379-3380.
Gschwendtner et al, "Sense System", IBM T.D.B., vol. 16, No. 12, May 1974, pp. 3960-3961.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

CMOS sense amplifier with isolated sensing nodes does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS sense amplifier with isolated sensing nodes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS sense amplifier with isolated sensing nodes will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-464551

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.