Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1998-10-28
2000-10-24
Guay, John
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257756, 257767, 257410, 257411, 257413, 257369, H01L 23485, H01L 2940
Patent
active
061371777
ABSTRACT:
There is provided a method of fabricating a CMOS semiconductor device including nMOSFET and pMOSFET, including the steps of (a) forming a gate insulating film on a semiconductor substrate, (b) forming a first polysilicon film on the gate insulating film, (c) forming an interlayer insulating film on the first polysilicon film, (d) forming a second polysilicon film on the interlayer insulating film, (e) shaping the first polysilicon film, the interlayer insulating film, and the second polysilicon film into a gate electrode in both a first region where the nMOSFET is to be fabricated and a second region where the pMOSFET is to be fabricated, and (f) doping n-type impurities into the first region and p-type impurities into the second region by ion-implantation. The method makes it possible to prevent reduction in dielectric voltage of a gate insulating film, which would be caused by diffusion of titanium atoms, without causing a gate electrode to be depleted.
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Japanese Office Action (with translation) dated Dec. 22, 1999.
Guay John
NEC Corporation
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