CMOS Selection circuit

Details CMOS Selection circuit CMOS Selection circuit

1982-04-30

1985-01-01

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

307243, 307451, H04Q 900

Patent

active

044918399

ABSTRACT:
In a circuit for selecting a random number (N) of potentials (Ui . . . ), which is integrated in accordance with the complementary insulated-gate field-effect transistor technique, one transmission gate (G . . . ) is associated with each potential, with the switching section of the gate lying between the potential (Ui . . . ) and the output (U), and the two control inputs of the respective transmission gate (G . . . ) are connected either directly or via a respectively associated inverter (I . . . ) to the corresponding output of a CMOS-1-ex-n-decoder. This decoder may consist of a 1-ex-n-open-circuit-decoder (SD) and of a 1-ex-n-short-circuit decoder (KD) whose address inputs are connected in pairs to one another and whose like outputs (1 . . . 8) are connected to one another. The open-circuit decoder (SD) consists of transistors (TP) of the one channel conductivity type, and the short-circuit decoder (KD) consists of transistors (TN) of the other channel conductivity type.

REFERENCES:
patent: 4091293 (1978-05-01), Ando
patent: 4424460 (1984-01-01), Best

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