CMOS Schmitt trigger

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307205, 307214, 307290, H03K 3295, H03K 1908, H03K 1940

Patent

active

039847039

ABSTRACT:
The input of the Schmitt trigger is applied in parallel to the gates of a plurality of stacked MOS transistors. The stacked transistors are connected with their respective source and drain electrodes in series with a source of potential and with the drain electrode of a p channel transistor being connected to the adjacent drain electrode of an n channel transistor to define an output node on which the output hysteresis signal is derived. Upper and lower trip point reference potentials are established on the respective source electrodes of said output node defining p and n channel transistors. At least one of the trip point reference potentials is gated to the respective source electrode as a function of the state of the output, i.e., whether the output is high or low. The input signal is compared in the stack with the established trip point reference potentials to derive the upper and lower trip points dependent upon the sign of the change in the potential of the input signal to produce hysteresis in the transfer function of the device. The output hysteresis signal is inverted and a portion of the inverted output signal is fed back via a second inverter to the output node for stabilizing the output signal.

REFERENCES:
patent: 3651342 (1972-03-01), Dingwall
patent: 3739193 (1973-06-01), Pryor
patent: 3812384 (1974-05-01), Skorup
patent: 3873856 (1975-03-01), Gerlach
patent: 3904888 (1975-09-01), Griffin et al.

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