CMOS salicide process using germanium implantation

Details CMOS salicide process using germanium implantation CMOS salicide process using germanium implantation

1988-03-08

1989-05-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 27, 437 29, 437 41, 437200, 437933, 357 231, H01L 21265

Patent

active

048351121

ABSTRACT:
A salicided twin-tub CMOS process using germanium implantation to retard the diffusion of the dopants, such as phosphorus and boron. Implantation of n+ and p+ dopants after titanium salicidation is employed to fabricate devices with low junction leakage and good short-channel effects. Also, the germanium dopant may be introduced before or after the formation of the refractory metal silicide formation, and may be implanted independently or together with the dopant whose diffusion in the silicon it will modify. The employment of germanium permits the use of a phosphorus implant through a relatively thick refractory metal silicide contact layer. If arsenic is implanted through the silicide layer to solve the deep junction problem, the silicide layer must be thin to permit the passage of the larger arsenic atoms typically stopped by the silicide. Thinner silicide layers have the disadvantage of higher sheet resistances.

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T. Yoshida et al., "Self-Aligned Titanium Silicided Junctions Formed by Rapid Thermal Annealing in Vacuum", J. Electrochem. Soc.: Solid-State Science and Tech., vol. 135, No. 2, pp. 481-486.

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