CMOS process polysilicon strip loaded waveguides with a...

Details CMOS process polysilicon strip loaded waveguides with a... CMOS process polysilicon strip loaded waveguides with a...

2006-10-03

2006-10-03

Font, Frank G. (Department: 2883)

Optical waveguides

Planar optical waveguide

Thin film optical waveguide

C385S129000

Reexamination Certificate

active

07116881

ABSTRACT:
A standard CMOS process is modified to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. A polysilicon strip loaded waveguide is used as an example to illustrate the invention. The waveguide has a three layer core made of a polysilicon strip on a silicon slab with a silicon dioxide layer between the strip and the slab. In a standard CMOS process, a layer of metallic salicide is deposited for metallic contacts for electronic components, such as transistors. In the present invention, prior to the deposition of the salicide, a salicide blocking layer is selectively deposited for protecting silicon waveguide against damages. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide.

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