CMOS photodetector including an amorphous silicon photodiode...

Details CMOS photodetector including an amorphous silicon photodiode... CMOS photodetector including an amorphous silicon photodiode...

2002-05-08

2004-12-14

Luu, Thanh X. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

Reexamination Certificate

active

06831264

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the monolithic forming of image sensors intended to be used in shooting devices such as, for example, cameras, camcorders, digital microscopes, or digital photographic cameras. More specifically, the present invention relates to image sensors formed in CMOS technology.
2. Description of the Related Art
An image sensor formed in CMOS technology generally includes a matrix of photodetectors arranged at the intersection of lines and columns.
FIG. 1
schematically shows an example of a CMOS-type photodetector of an image sensor matrix. A photodiode D has its anode connected to a low reference voltage VSS. The cathode of photodiode D is connected to a detection node SN. An initialization MOS transistor T
1
and a MOS measurement transistor T
2
, with N channels, have their drain connected to a high supply voltage VDD. The source of transistor T
1
and the gate of transistor T
2
are connected to detection node SN. The gate of transistor T
1
receives a signal NI controlling the initialization of node SN. An N-channel MOS transistor T
3
has its drain connected to the source of transistor T
2
. The gate of transistor T
3
receives a line selection signal LS. The source of transistor T
3
is connected to a read means
2
. Read means
2
receives a read control signal ST. Means
2
is connected to other photodiodes, not shown, of the matrix.
The photodiode D of a photodetector such as in
FIG. 1
may be formed in the same substrate as the other photodetector elements. Its light-receiving surface area must be sufficient to ensure a good detection, the surface area occupied by the other photodetector elements reducing the number of photons captured by the photodiode. To increase the surface area of the photodiode without increasing the total surface area of a photodetector, a solution consists of forming the photodiode above the other photodetector elements.
FIG. 2
schematically shows as an example a cross-section view of a photodiode D and of a MOS initialization transistor T
1
of a photodetector, in which the photodiode is formed above the other photodetector elements. For readability reasons, the drawings representing the different semiconductor regions are not drawn to scale. Transistor T
1
is formed in a P-type active area
4
delimited by a silicon oxide (SiO
2
) field insulation region
8
. On either side of an insulated gate
10
, are N-type source and drain regions
12
and
14
of transistor T
1
. Transistor T
1
is covered with a layer
16
of an insulator (SiO
2
). Above layer
16
is formed an amorphous silicon layer including a lower region
18
, an intermediary intrinsic layer
20
, and an upper P-type layer
22
, to form a PIN-type photodiode. Layer
22
forms the anode of the photodiode and region
18
forms the cathode of the photodiode. Layer
22
is covered with a conductive transparent ITO layer
24
connected to voltage VSS. Region
18
is connected by a conductive via
28
to source region
12
. A conductive region
26
may be arranged under region
18
.
FIG. 3
illustrates, in a phase of measurement of the light received by the photodetector of
FIG. 1
, the variations along time of signals LS and NI, of voltage VSN of node SN, and of signal ST. Transistor T
2
is assembled as a follower of voltage VSN of node SN. For simplicity, it is assumed hereafter that transistor T
2
has a unity gain and that the source voltage of transistor T
2
is substantially equal to voltage VSN. It is thus considered that read means
2
, connected to the source of transistor T
2
via transistor T
3
, enables storing voltage VSN.
At a time t
0
, selection signal LS is at 1 so that transistor T
3
is on and that the source of transistor T
2
is connected to read means
2
. Read signal ST is at 0 and read means
2
is deactivated. At time t
0
, initialization signal NI is brought to 1, for a short initialization duration, to bring voltage VSN to VDD. At the end of this initialization, signal NI falls back to 0. Voltage VSN then drops by a voltage &Dgr;
0
, especially due to the capacitive coupling existing between the gate and the source of transistor T
1
, as well as to noise introduced by transistor T
1
.
At a time t
1
, after signal NI has returned to 0, signal ST is activated after a short time to control the reading of voltage VDD-&Dgr;
0
by means
2
. From the time when transistor T
1
is no longer on and when the photodiode cathode is no longer connected to VDD, and if photodiode D is submitted to a light radiation, electrons accumulate at the photodiode cathode. Voltage VSN of the cathode then decreases proportionally to the received light.
At a time t
2
, signal LS is brought to 0 to turn transistor T
3
off and to isolate the photodetector from means
2
. Means
2
can then be connected to another photodetector of the image sensor.
At a time t
3
, after a predetermined duration during which the photodiode is submitted to a light radiation which is desired to be measured, signal LS is brought back to 1 and transistor T
3
is turned on.
At a time t
4
, signal ST is shortly activated to control the reading of voltage VSN by means
2
. Voltage VSN then has a value VDD-&Dgr;
0
-&Dgr;
1
, where &Dgr;
1
depends on the number of photons received by the photodiode and on a negligible thermal noise. The measurement of VDD-&Dgr;
0
-&Dgr;
1
is subtracted to the preceding measurement of VDD-&Dgr;
0
to know value &Dgr;
1
and thus the light received by the photodiode between times t
1
and t
4
.
An amorphous silicon diode includes charge traps likely to store electrons for a so-called relaxation time. In each light measurement phase such as described in
FIG. 3
, part of the electrons accumulated in the photodiode cathode between times t
1
and t
4
are immobilized by the charge traps of the photodiode. Value &Dgr;
1
measured at the end of the measurement phase does not take into account the electrons stored in the charge traps, and the measurement is vitiated. Further, the duration of connection to voltage VDD during the initialization phase is insufficient to empty all the charge traps. Thus, at the beginning of each measurement phase, charge traps contain an amount of parasitic electrons which depends on the light received in one or several preceding measurement phases. These parasitic electrons, which are released at the end of the charge trap relaxation time, vitiate measured value &Dgr;
1
. The value &Dgr;
1
measured at the end of each measurement phase thus partly depends on the light received in the preceding measurement phase(s). In an image sensor including a photodetector matrix, this electron retention phenomenon causes a remanence or a decay of the image. The significance of the decay especially depends on the amount of traps in the photodiode and of the average electron retention duration of these traps.
A known solution to suppress this decay phenomenon consists of limiting the number of traps in photodiode D. This solution implies forming photodiode D in a custom-made amorphous silicon, and implies a costly lengthening of the circuit manufacturing duration.
BRIEF SUMMARY OF THE INVENTION
An embodiment of the present invention provides a CMOS photodetector including an amorphous silicon photodiode of simple structure, with a low-cost manufacturing, and which does not cause a decay phenomenon such as previously described.
The photodiode has its anode connected to a reference voltage and the photodetector further includes, an initialization MOS transistor connected between the cathode of the photodiode and a first supply voltage to set the cathode to the first supply voltage during an initialization phase, and means for measuring the voltage of the cathode of the photodiode, including saturation means for bringing the photodiode cathode to a saturation voltage close to the reference voltage immediately before the initialization phase.
According to an embodiment of the present invention, the source of the initialization MOS transistor is connected to the cathode of the photodiode and

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