CMOS phase interpolation system

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Phase shift by less than period of input

Reexamination Certificate

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Details

C327S175000

Reexamination Certificate

active

08081024

ABSTRACT:
A CMOS phase interpolation system comprises a capacitive integration unit coupled to a charge node and a plurality of selectively enabled current source units operably coupled to the charge node. The current source units each include: a charging segment; a discharging segment; and, a switching segment operable responsive to at least one periodic reference signal to selectively couple the charging and discharging segments to the charge node for alternatively charging and discharging the capacitive integration unit therethrough. The current source units are selectively enabled in predetermined combinations to uniquely define an output waveform at the charge node. An output conditioning unit coupled to the charge node generates a recovered periodic signal based on the output waveform. In certain applications, a duty cycle correction unit coupled to feed back from the output node adaptively biases a charging segment current of each enabled current source unit, responsive to the recovered periodic signal.

REFERENCES:
patent: 6384653 (2002-05-01), Broome
patent: 7038520 (2006-05-01), Chiba et al.
patent: 7206370 (2007-04-01), Nakao
patent: 7466179 (2008-12-01), Huang et al.

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