CMOS peak amplitude detector

Details CMOS peak amplitude detector CMOS peak amplitude detector

1993-01-29

1994-04-12

Callahan, Timothy P.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307358, G11C 2702, H03K 5153

Patent

active

053028635

ABSTRACT:
A fully-integrated CMOS peak detector stores the peak amplitude of an input signal using an on-chip storage capacitor. The fully-integrated CMOS peak detector includes a delay buffer, a transfer gate and a comparator. A discharge controller is used to step-down the peak amplitude stored on the on-chip storage capacitor some predetermined amount. The discharge controller includes a switched capacitor circuit which is placed in series with the storage capacitor such that the two capacitors act as a capacitive voltage divider to produce a predictable fraction of the acquired peak amplitude. Multiple peaks can be determined and/or stored by using multiple fully-integrated CMOS peak detectors in conjunction with a single comparator. A multiplexer is used in this configuration to control the multiple peak detectors.

REFERENCES:
patent: 4250406 (1981-02-01), Alaspa
patent: 4263548 (1981-04-01), Carlson et al.
patent: 4305042 (1981-12-01), Tanaka et al.
patent: 4473759 (1984-09-01), Mahabadi
patent: 4634895 (1987-01-01), Luong
patent: 4709204 (1987-11-01), Hayakawa
patent: 5015878 (1991-05-01), Lasagna et al.

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