CMOS output buffer with pre-drive circuitry to control slew rate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307263, H03K 1716, H03K 190948, H03K 604

Patent

active

052162931

ABSTRACT:
A CMOS output buffer comprises an output stage circuit including MOS transistors each having a CMOS structure, for outputting a signal, and an output stage control circuit arranged prior to the output stage circuit. The output stage control circuit includes a pull-up circuit and a pull-down circuit for controlling the gate of the final stage MOS transistor of the MOS transistors so that a speed at which a gate-to-source voltage varies when the final stage MOS transistor is turned on, is slower than a speed at which the gate-to-source voltage varies when the final stage MOS transistor is turned off.

REFERENCES:
patent: 4791321 (1988-12-01), Tanaka et al.
patent: 4797579 (1989-01-01), Lewis
patent: 4859870 (1989-08-01), Wong et al.
patent: 4972100 (1990-11-01), Lim et al.
patent: 5013940 (1991-05-01), Ansel
patent: 5117131 (1992-05-01), Ochi et al.

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