CMOS output buffer circuit with improved ground bounce

Details CMOS output buffer circuit with improved ground bounce CMOS output buffer circuit with improved ground bounce

1990-12-31

1992-06-23

Mis, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072471, 307572, 307596, H03K 1716, H03K 17687, H03K 17284

Patent

active

051245795

ABSTRACT:
A CMOS output buffer circuit for providing an output signal at an output terminal with a significant reduction in ground bounce includes a pull-up driver circuit (12), a pull-down driver circuit (14), and a control circuit (16). The pull-up driver circuit includes first and second resistive means for delaying the turn-on times of pull-up transistors. The pull-down driver circuit includes third and fourth resistive elements for delaying the turn-on times of pull-down transistors. Each of the first through fourth resistive elements (D1-D4) is formed of a transmission gate and serves to control the gate-to-source voltages applied to the respective gates of the pull-up and pull-down transistors.

REFERENCES:
patent: 4961010 (1990-10-01), Davis
patent: 5034637 (1991-07-01), Jungert

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