CMOS output buffer

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 307451, 307585, 307270, H03K 19017, H03K 19094, H03K 1920, H03K 17693

Patent

active

046212086

ABSTRACT:
A synchronizing buffer arrangement for a CMOS memory with output drive transistors receiving one of a pair of input data signals, and being subject to the pull-up and pull-down support of the other of said data signals.

REFERENCES:
patent: 4280065 (1981-07-01), Minato et al.
patent: 4300213 (1981-11-01), Tanimura et al.
patent: 4363978 (1982-12-01), Heimbigner
patent: 4491749 (1985-01-01), Iwamura
patent: 4540904 (1985-09-01), Ennis et al.
Griffin et al., "High Speed Complementary Driver Circuit"; IBM-TDB; vol. 24, No. 5, pp. 2558-2559; 10/1981.

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