CMOS low voltage current reference

Details CMOS low voltage current reference CMOS low voltage current reference

1996-08-19

1998-04-28

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327378, 327538, 327530, 323 32, G05F 110

Patent

active

057450005

ABSTRACT:
A CMOS current reference is provided that is relatively independent of supply voltage and generates a substantially steady current. The current reference includes a plurality of P-channel FETs and a plurality of zero threshold voltage N-channel FETs that provide a high level of voltage supply rejection at relatively low supply voltage levels (1.5 to 3.3 volts). Utilization of the P-channel FETs and the zero threshold voltage N-channel FETs in a current mirror and cascade configuration reduces the sensitivity of the current to variations in the supply voltage. The current reference exhibits higher offset voltage capabilities. In addition, the CMOS current reference may be designed to compensate for process variations since the current will increase as the channel length of the zero threshold voltage N-channel FETs increases.

REFERENCES:
patent: 5304861 (1994-04-01), Fruhauf et al.
patent: 5493533 (1996-02-01), Lambrache
patent: 5572161 (1996-11-01), Myers
patent: 5578960 (1996-11-01), Matsumura et al.
Sedra et al., Microelectronic Circuits, 1991, p. 301.
Tham, Khong-Meng, "A Low Supply Voltage High PSRR Voltage Reference on CMOS Process," IEEE Journal of Solid State Circuits, vol. 30, No. 5, May 1995, pp. 586-589.
Chapter 3, "Current Sources, Voltage Sources, and References," pp. 178-181 (author, origin and date unknown).

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