CMOS low output voltage bus driver

Details CMOS low output voltage bus driver CMOS low output voltage bus driver

1990-11-05

1993-01-12

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307451, 307465, 365154, H03K 301

Patent

active

051792990

ABSTRACT:
In a high speed digital computer data transfer system, a data bus driver reduces data bus voltage swings between logic high and logic low levels by defining minimum and maximum bus voltages which lie between said logic levels, thus lowering bus transition and hence data transfer times. Positive and negative overshoot of the reduced bus logic levels are prevented by "clamping diode" transistors. The data bus driver assumes a tri-state mode when not transmitting data, during which the clamping diode transistors also eliminate positive and negative bus voltage overshoot. The preferred embodiment is implemented using complementary metal-oxide-semiconductor (CMOS) technology.

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"High Speed Complementary Driver Circuit," by W. R. Griffin and P. N. Horowitz, IBM Technical Disclosure Bulletin, vol. 24, No. 5, Oct. 1981, pp. 2558-2559.

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