CMOS logic circuitry providing improved operating speed

Details CMOS logic circuitry providing improved operating speed CMOS logic circuitry providing improved operating speed

1993-03-19

1994-07-12

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, H03K 19094

Patent

active

053291859

ABSTRACT:
Electrical circuitry of CMOS inverter circuits in cascade providing a compatible interface between ECL logic levels and CMOS logic levels. The MOS transistors of the first inverter circuit of the series are approximately three times larger than the MOS transistors of the same type in subsequent inverter circuits of the series. The ECL input is to the gate of the N-type transistor of the first inverter circuit. A threshold control input is connected to the gate of the P-type transistor of the first inverter circuit. This configuration increases the operating speed of the first inverter circuit and permits controlling the threshold voltage in order to stabilize the output duty cycle.

REFERENCES:
patent: 4763021 (1988-08-01), Stickel
patent: 4808852 (1989-02-01), Kousaka et al.
Taub and Schilling, Digital Integrated Electronics, McGraw-Hill Book Co., New York, N.Y., 1977, pp. 260-265.

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