CMOS level shift circuit with active pull-up and pull-down

Details CMOS level shift circuit with active pull-up and pull-down CMOS level shift circuit with active pull-up and pull-down

1989-01-03

1990-12-25

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 3072721, H03K 17693

Patent

active

049805835

ABSTRACT:
A CMOS level shift circuit with active pull-up uses a pair of pull up transistors activated during the period when an output node needs to be rapidly pulled up. The pull up transistors are activated by the outputs of a combinatorial logic or memory circuit detecting when a change of input signal has occurred and activating the respective pull up transistor to bring the output to the proper state.

REFERENCES:
patent: 4532436 (1985-07-01), Bismarck
patent: 4656373 (1987-04-01), Plus
patent: 4672243 (1987-06-01), Kirsch
patent: 4695744 (1987-09-01), Giordano
patent: 4703199 (1987-10-01), Ely
patent: 4717836 (1988-01-01), Doyle
patent: 4845381 (1989-07-01), Cuevas

Affiliated with

Also associated with

Rating

CMOS level shift circuit with active pull-up and pull-down does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS level shift circuit with active pull-up and pull-down, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS level shift circuit with active pull-up and pull-down will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1164929