CMOS inverter chain

Details CMOS inverter chain CMOS inverter chain

1986-12-05

1988-03-29

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307452, 377 79, 377121, 377105, H03K 1920, H03K 19096, H03K 19017

Patent

active

047345977

ABSTRACT:
A CMOS inverter chain includes the alternating series connection of N- and P-inverters. An N-inverter is a conventional type of CMOS inverter employing an N-intermediate transistor between both the P- and the N-transistor; a P-inverter, however, is a CMOS inverter employing a P-intermediate transistor between both the P- and the N-transistor. The gates of the intermediate transistors are interconnected and controlled by the clock signal, whereas the inverter input is constituted by the interconnected gates of the P- and the N-transistor of each inverter. Such an inverter chain can be used, for example, as a digital pulse width discriminator, as a final position counter, as a circuit for compensating signal drop-outs in input pulses, or else for effecting ring oscillator synchronizations.

REFERENCES:
patent: 4040015 (1977-08-01), Fukuda
patent: 4057741 (1977-11-01), Piguet
patent: 4250406 (1981-02-01), Alaspa
patent: 4567386 (1986-01-01), Benschop

Affiliated with

Also associated with

Rating

CMOS inverter chain does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS inverter chain, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS inverter chain will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1090467