CMOS integrated super-heterodyne television receiver with...

Television – Receiver circuitry – Tuning

Reexamination Certificate

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C348S725000, C348S726000

Reexamination Certificate

active

07639311

ABSTRACT:
Integrated super-heterodyne television receivers with multiple signal paths implemented using CMOS technology. An integrated circuit, includes: a plurality of CMOS (Complementary Metal-Oxide Semiconductor) low noise amplifiers; an adjustable frequency source; and one or more down-conversion mixers coupled with the adjustable frequency source and the plurality of CMOS low noise amplifiers to form a plurality of super-heterodyne receiving paths between an input to the plurality of CMOS low noise amplifiers and an output from one or more down-conversion mixers; where the integrated circuit is implemented on a single chip of semiconductive substrate.

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Stephen Wu and Behzad Razavi, “A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications”, IEEE Journal of Solid-State Circuits, vol. 33, No. 12, Dec. 1998.
Sanggyu Sim, Ralph Kuhn, et al., “A Three-Band-Tuner for Digital Terrestrial and Multistandard Reception”, IEEE Transactions on Consumer Electronics, vol. 48, No. 3, Aug. 2002.
Mark Dawkins, Alison Payne Burdett, et al., “A Single-Chip Tuner for DVB-T”, IEEE Journal of Solid-State Circuits, vol. 38, No. 8, Aug. 2003.
Bud Taddiken, Will Ezell, et al., “Broadband Tuner on a Chip for Cable Modem, HDTV, and Legacy Analog Standards (Invited)”, IEEE Radio Frequency Integrated Circuits Symposium, 2002.
Curtis Ling, Raymond Montemayor, et al., “A Low-Power Integrated Tuner for Cable Telephony Applications”, IEEE Journal of Solid-State Circuits, vol. 37, No. 12, Dec. 2002.

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