CMOS integrated devices in seeded islands

Details CMOS integrated devices in seeded islands CMOS integrated devices in seeded islands

1987-07-29

1989-01-17

Edlow, Martin H.

357 237, 357 239, 357 2311, 357 2314, 357 41, 357 49, 357 51, H01L 2978, H01L 2702, H01L 2904

Patent

active

047990970

ABSTRACT:
The structure of a pair of concentrically disposed field effect transistors responsive to a common gate electrode, and a process for the fabrication thereof. In one form, a dielectric region is surrounded by an active region of monocrystalline silicon and has situated upon the dielectric region a layer of recrystallized silicon as a second active region. A gate electrode overlies both active regions and serves as a mask to form in such respective regions self-aligned channels. The concentric placement of the active substrate monocrystalline silicon region, and inner perimeter of dielectric, and a further inner active region of recrystallized silicon situated over a dielectric region, facilitates recrystallization from seed of monocrystalline silicon irrespective of the direction of translation taken by the energy beam, and associated melt, in scanning across the structure. The operational characteristics of the field effect transistor formed from recrystallized silicon are suitable for and readily interconnected as an element of a inverter/buffer, with the field effect transistor formed in the surrounding substrate active region.

REFERENCES:
patent: 4033797 (1977-07-01), Dill et al.
patent: 4487635 (1984-12-01), Kugimiya et al.
patent: 4593453 (1986-06-01), Tam et al.
patent: 4684967 (1987-08-01), Taylor, Sr. et al.
patent: 4754314 (1988-06-01), Scott et al.

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