CMOS integrated circuit including forming doped wells, a layer o

Details CMOS integrated circuit including forming doped wells, a layer o CMOS integrated circuit including forming doped wells, a layer o

1998-05-04

2000-08-29

Bowers, Charles

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

257 65, 257617, H01L 2906

Patent

active

061112674

ABSTRACT:
An integrated CMOS circuit, and method for producing same, including a semiconductor substrate having a p-channel MOS transistor and an n-channel MOS transistor formed therein and having a first silicon layer, a stressed Si.sub.1-x Ge.sub.x layer and a second silicon layer which are preferably grown by selective epitaxy. In an ON state, a buried channel is formed in the stressed Si.sub.1-x Ge.sub.x layer in the p-channel MOS transistor and a surface channel is formed in the second silicon layer in the n-channel MOS transistor.

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