CMOS integrated circuit

Details CMOS integrated circuit CMOS integrated circuit

1985-01-15

1987-06-09

Popek, Joseph A.

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357 42, 357 43, H01L 2702

Patent

active

046725849

ABSTRACT:
A CMOS integrated circuit includes a P-channel type MOS transistor which is formed on an N-type silicon substrate, an N-channel type MOS transistor which is formed on a P well formed in the substrate, and parasitic bipolar transistors which are electrically connected to each other to form a kind of thyristor structure. A power supply voltage is applied to a source electrode of the P-channel type MOS transistor through a part of the substrate which presents a resistance. The resistance is electrically connected to the parasitic bipolar transistor of the thyristor structure to thereby prevent the occurrence of a latch-up phenomenon in which a large current continuously flows through the parasitic bipolar transistors and may destroy the CMOS integrated circuit. Because of the prevention of the latch-up phenomenon, the CMOS integrated circuit is always maintained in good condition.

REFERENCES:
patent: 4261004 (1981-04-01), Masuhara et al.
patent: 4327368 (1982-04-01), Uchida
patent: 4524377 (1982-06-01), Eguehi

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