CMOS input level shifting circuit with temperature-compensating

Details CMOS input level shifting circuit with temperature-compensating CMOS input level shifting circuit with temperature-compensating

1986-02-04

1988-01-05

Miller, Stanley D.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307200B, 307443, 307450, 307451, 307475, 307579, 307297, 357 41, 357 51, H03K 1714

Patent

active

047178361

ABSTRACT:
A CMOS input level shifting circuit includes a temperature-compensating N-channel field effect transistor structure wherein a resistance in series with the source region includes an extension of a lightly doped P-type region in which the source and drain regions are diffused. This structure produces a temperature-compensating variation in the drain current proportional to the square of the series resistance without requiring modification of standard processes for manufacturing CMOS integrated circuits. The relatively large, temperature-dependent variation of the series resistance produces a corresponding temperature-dependent variation in the drain current that effectively temperature-compensates the switching point of the CMOS input level shifting circuit.

REFERENCES:
patent: 4072868 (1978-02-01), De La Moneda et al.
patent: 4205342 (1980-05-01), Darwish et al.
patent: 4209713 (1980-06-01), Satou et al.
patent: 4242604 (1980-12-01), Smith
patent: 4264874 (1981-04-01), Young
patent: 4333171 (1982-06-01), Nishikubo
patent: 4481521 (1984-11-01), Okumura
patent: 4563601 (1986-01-01), Asano et al.
patent: 4612461 (1986-09-01), Sood
"Noise Immunity Improvement of CMOS-CVC Logic Circuits", IBM T.D.B., vol. 27, No. 11, Apr. 1985, p. 6794.

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