CMOS implementation of a built-in self test input generator (BIS

Details CMOS implementation of a built-in self test input generator (BIS CMOS implementation of a built-in self test input generator (BIS

1988-04-25

1990-01-09

Fleming, Michael R.

Excavating

371 251, G06F 1100

Patent

active

048933112

ABSTRACT:
A CMOS implementation of a Built In Self Test Input Generator (BISTIG) for testing embedded PLA structures. The BISTIG tests for all stuck at faults, cross-point faults and bridging faults, by asserting exactly one input row and exactly one product term of the PLA under test at a time.

REFERENCES:
patent: 4418410 (1983-11-01), Goetze
patent: 4461000 (1984-07-01), Young
patent: 4546473 (1985-10-01), Eichelberger
patent: 4672610 (1987-06-01), Salick

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