CMOS imager with quantized correlated double sampling

Details CMOS imager with quantized correlated double sampling CMOS imager with quantized correlated double sampling

2001-06-18

2004-11-09

Garber, Wendy R. (Department: 2612)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S241000

Reexamination Certificate

active

06816196

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to electronic imaging devices, and in particular to a CMOS imager employing correlated double sampling to reduce noise.
2. Related Art
Electronic imaging devices (“imagers”) find use in a broad range of applications in many distinct fields of technology including the consumer, industrial, medical, defense and scientific fields. Imagers use an array of photoreceptors to convert photons bearing image information into electrical signals representative of the image.
In recent years, CMOS image sensors have become a practical implementation option for imagers and provide cost and power advantages over other technologies such as charge coupled devices (CCD). A conventional CMOS image sensor is typically structured as an array of photoreceptors, each of which is approximately reset to a known potential after the readout of an image. However, the performance of a CMOS image sensor suffers from both fixed pattern noise (i.e., noise that tends to be the same for each readout, such as amplifier DC offset) and temporal noise (i.e., noise that varying or random, such as the noise associated with resetting the photoreceptors). Both types of noise undesirably distort the image obtained by the CMOS image sensor.
Correlated double sampling has provided one technique for addressing fixed pattern and temporal noise in a CMOS image sensor. With correlated double sampling, the imager reads and stores the charge level on each photoreceptor in the CMOS image sensor immediately after reset. At the end of an exposure period (i.e., after an integration period), each photoreceptor is read again, and the original charge level is subtracted from the final charge level. In this manner, image distorting offsets associated with fixed pattern noise and pixel reset temporal noise can be cancelled.
However, as CMOS image sensors grow in size, so do the memory requirements for performing correlated double sampling. The memory requirements are exacerbated by the use of high performance A/D converters, which may provide output resolution of
8
,
10
, or more bits. Thus, for example, at 10 bit resolution, a 1024×1024 photoreceptor CMOS image sensor requires 10,485,760 bits or 1.25 MBytes of memory to store the charge values of the photoreceptors immediately after reset. Extensive memory requirements increase the cost and complexity of CMOS imagers that incorporate CMOS image sensors.
A need exists for an improved CMOS imager that addresses the problems noted above and other previously experienced.
SUMMARY
An improved CMOS imager is arrived at by implementing quantized correlated double sampling in conjunction with a CMOS image sensor. The CMOS imager may be broadly conceptualized as an imager that achieves reduced noise image extraction from a CMOS image sensor with less complexity, less memory and less expense than convention correlated double sampling implementations.
There is an uncertainty in the starting value of each photoreceptor at the beginning of integration that is caused by noise in the process that resets the photoreceptor to an initial voltage. The reset noise is reduced to a much smaller level by reading the photoreceptor immediately after reset and saving the initial voltage as a stored representation in memory. In addition, an approximate correction is then applied to the stored representation after readout of the photoreceptor after the integration period. The correction is designed to reduce the contribution of reset noise until the dominant noise source in the final image is temporal noise from readout electronics.
For example, one implementation of the CMOS imager includes a CMOS image sensor comprising an array of photoreceptors, a memory storing a reference operating level for the array, and readout circuitry for obtaining, at n-bit resolution, a photoreceptor reset value from the photoreceptors in the array. The CMOS imager also includes comparison circuitry that determines a matched bin based on the reference operating level and the photoreceptor reset value. The matched bin is one of several noise bins, each with an assigned correction level, that quantizes a photoreceptor noise range.
Each of the noise bins (and thus the correction levels) is associated with an m-bit correction code, where m is typically much less than n. Thus, for example, n may be
10
and m may be
3
or
4
. One result is that the amount of memory necessary to store a correction code for each photoreceptor is far less than that required to store full resolution (i.e., n-bit) photoreceptor reset values required by conventional correlated double sampling. As will be explained in detail below, complexity and cost benefits result.
Other implementations, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.


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patent: 6115066 (2000-09-01), Gowda et al.
patent: 6750906 (2004-06-01), Itani et al.

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