CMOS imager flush reset

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

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Details

C348S229100

Reexamination Certificate

active

08059178

ABSTRACT:
A complementary metal oxide semiconductor (CMOS) imager flush reset circuit is provided. The flush reset circuit has an interface to receive first (e.g., VDD) and second (e.g., ground) reference voltages. The flush reset circuit has a solitary (flush) signal interface. There is also an interface connected to a transistor set power interface to supply a Vflush1signal at least one threshold voltage different than the second reference voltage, in response to receiving a flush signal. The flush signal is used to create a CMOS imager hard reset prior to a soft reset.

REFERENCES:
patent: 6380976 (2002-04-01), Borg
patent: 6424375 (2002-07-01), Fowler
patent: 7205522 (2007-04-01), Krymski
patent: 7274396 (2007-09-01), Bock
Bedabrata Pain et al, “An Enhanced-Performance CMOS Imager With a flushed-Reset Photodiode pixel” pp. 48-56, IEEE Trans. On Electron Devices, vol. 50, No. 1, Jan. 2003.
K. M. Findlater et al, “A CMOS Image Sensor With a Double-Junction Active Pixel”, IEEE Trans. ED 50, #1, pp. 32-42, Jan. 2003.

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