CMOS imager column buffer gain compensation circuit

Details CMOS imager column buffer gain compensation circuit CMOS imager column buffer gain compensation circuit

1998-04-14

2001-01-02

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S112000, C327S437000

Utility Patent

active

06169430

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electronic amplifiers, and more particularly, to linear gain amplifiers that can be conveniently employed by CMOS based solid state image sensors.
BACKGROUND OF THE INVENTION
Present applications, including electronic imaging systems, electronic printings, accurate measurement systems, data acquisition systems, automatic control systems and others, require high resolution signal/data processing. Circuits employing source followers are widely used in IC designs within these systems because of the relatively small size of these circuits. Additionally these circuits have low output resistance and good frequency response. Electronic imagers in the form of solid-state sensors made from a standard CMOS process can employ both analog and digital circuits integrated within the sensor array on the same silicon chip.
Process variations (which are inherent to any process and can not be eliminated) present problems for solid state imagers that are arranged in an array of rows and columns because offsets exist between the columns as a result of these process variations. These offsets generate what called is typically referred to in the art as “fixed column pattern noise”. The “fixed column pattern noise” must be removed before analog to digital conversion is accomplished. For any array that is arranged in columns, an individual output buffer (source follower) is required for each column. Both PMOS and NMOS source followers have voltage gains that change with the input signal levels. The buffer voltage gain variations make high resolution (8-bit or higher) systems virtually impossible without a technique that can greatly improve the output linearity of these output buffers.
From the foregoing discussion, is should be apparent that there remains a need within the art for an output buffer circuit that has improved linearity over those existing within the prior art.
SUMMARY OF THE INVENTION
A CMOS imager is arranged in a plurality of rows and columns with a gain compensation circuit supplied for each of the columns. The gain compensation circuit has a first source follower circuit that employs majority carriers of a first polarity yielding a first voltage gain as a function of its input voltage, and a second source follower circuit employing majority carriers of second polarity opposite the first polarity yielding a voltage gain that is essentially the opposite of the first voltage gain variation as compared to its input voltage. The input to the second source follower circuit that is electrically coupled to the output of the second source follower circuit resulting in a gain compensation between the first and second source follower circuits. A selection circuit is configured to enable the gain compensation circuit upon activation of a column select signal.
The output buffer voltage gain compensation circuit of the present invention uses both PMOS source follower amplifiers and NMOS source follower amplifiers that have, essentially, opposite voltage gain characteristics resulting in the input to each changing opposite directions. The preferred embodiment employs a PMOS source follower proceeds an NMOS source follower. By properly setting the biasing current and transistor sizes, the overall variability of the voltage gain of this circuit can be controlled to be less than 0.3%.
The above and other features and advantages of the invention are provided by a voltage gain compensation circuit comprising: a first amplifier configuration having a first set of gain characteristics; a second amplifier configuration having a second set of gain characteristics, the second amplifier being electrically coupled to the first amplifier; and wherein the first set of gain characteristics and the second set of gain characteristics are essentially opposite.


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