CMOS image sensor module with wafers

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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C257S432000, C257S434000, C257S734000, C257S778000, C257S780000

Reexamination Certificate

active

07446384

ABSTRACT:
The present invention relates to an image sensor module and a manufacturing method thereof, especially to a wafer level chip size package (WL-CSP) realized by directly contacting an image sensor chip wafer to a glass wafer on which an IR filter coating layer is deposited, an electrode rearrangement and a dicing process, a miniaturized image sensor module using this wafer level chip size package (WL-CSP) and a method thereof. The CMOS image sensor module using a wafer level chip size package technology according to the present invention comprises: an image sensor chip wafer having a partition with a lattice structure formed at portions except an image sensing area; and a glass wafer with an IR filter coating layer and a metal electrode; and wherein the image sensor chip wafer and the glass wafer form an electric contact and a chip sealing by a flip-chip bonding; and wherein a solder bump and a non solder bump are formed after a metal wiring is rearranged on a lower surface of the glass wafer. According to the present invention, it is possible to realize a cheap wafer level chip size package (WL-CSP) using the existing wafer processing and the metal deposition processing equipments. Further, an image sensor module with smaller thickness and area than the existing CSP package can be realized. Moreover, an image sensor module with a smaller area than the existing COG package can be realized.

REFERENCES:
patent: 6737292 (2004-05-01), Seo
patent: 7087464 (2006-08-01), Yu et al.
patent: 7221051 (2007-05-01), Ono et al.
patent: 2005/0051859 (2005-03-01), Hoffman
patent: 410154726 (1998-06-01), None
patent: 10-2006-0016413 (2006-02-01), None
Charles A. Harper, Electronic Packaging and Interconnection Handbook, 2000, pp. 1.11, 1.12 and 1.36.
Charles A. Harper, Electronic Packaging and Interconnection Handbook, 2000, pp. 1.28-1.30.

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